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Model: NSO4GU3AB
vervoer: Ocean,Air,Express,Land
betaling Type: L/C,T/T,D/A
Incoterm: FOB,EXW,CIF
4GB 1600MHz 240-pins DDR3 Udimm
Revisiegeschiedenis
Revision No. |
History |
Draft Date |
Remark |
1.0 |
Initial Release |
Apr. 2022 |
|
Informatietabel bestellen
Model |
Density |
Speed |
Organization |
Component Composition |
NS04GU3AB |
4GB |
1600MHz |
512Mx64bit |
DDR3 256Mx8 *16 |
Beschrijving
Hengstar ongebufferde DDR3 SDRAM DIMM's (ongebufferde dubbele gegevenssnelheid synchrone DRAM dubbele in-line geheugenmodules) zijn laag vermogen, high-speed bediening geheugenmodules die DDR3 SDRAM-apparaten gebruiken. NS04GU3AB is een 512 m x 64-bit twee rank 4 GB DDR3-1600 CL11 1.5V SDRAM ongebufferd DIMM-product, gebaseerd op zestien 256m x 8-bit FBGA-componenten. De SPD is geprogrammeerd naar Jedec Standard Latentie DDR3-1600 timing van 11-11-11 bij 1,5 V. Elke 240-pins DIMM maakt gebruik van gouden contactvingers. De SDRAM -ongebufferde DIMM is bedoeld voor gebruik als hoofdgeheugen wanneer geïnstalleerd in systemen zoals pc's en werkstations.
Functies
Power levering: VDD = 1,5 V (1.425V tot 1.575V)
VDDQ = 1.5V (1.425V tot 1.575V)
800MHz FCK voor 1600 MB/sec/pin
8 Onafhankelijke interne bank
Programmable CAS -latentie: 11, 10, 9, 8, 7, 6
Programmeerbare additieve latentie: 0, CL - 2 of CL - 1 klok
8-bit pre-fetch
Burst Lengte: 8 (interleave zonder enige limiet, alleen opeenvolgend met startadres "000"), 4 met TCCD = 4 die niet naadloos lees of schrijft [op de vlieg met A12 of MRS]
BI-Directionele differentiële gegevensstrobe
Interne (zelf) kalibratie; Interne zelfkalibratie via ZQ -pin (RZQ: 240 ohm ± 1%)
On dobbelsteen met behulp van ODT -pin
Average vernieuwingsperiode 7.8us bij lager dan TCase 85 ° C, 3,9US bij 85 ° C <tcase <95 ° C
Anchrone reset
Vergemeenbare gegevens-output-stationsterkte
Vlieg-by topologie
PCB: hoogte 1,18 ”(30 mm)
ROHS conform en halogeenvrij
Belangrijkste timingparameters
MT/s |
tRCD(ns) |
tRP(ns) |
tRC(ns) |
CL-tRCD-tRP |
DDR3-1600 |
13.125 |
13.125 |
48.125 |
2011/11/11 |
Adrestabel
Configuration |
Refresh count |
Row address |
Device bank address |
Device configuration |
Column Address |
Module rank address |
4GB |
8K |
32K A[14:0] |
8 BA[2:0] |
2Gb (256 Meg x 8) |
1K A[9:0] |
2 S#[1:0] |
PIN -beschrijvingen
Symbol |
Type |
Description |
Ax |
Input |
Address inputs: Provide the row address for ACTIVE commands, and the column |
BAx |
Input |
Bank address inputs: Define the device bank to which an ACTIVE, READ, WRITE, or |
CKx, |
Input |
Clock: Differential clock inputs. All control, command, and address input signals are |
CKEx |
Input |
Clock enable: Enables (registered HIGH) and disables (registered LOW) internal circuitry |
DMx |
Input |
Data mask (x8 devices only): DM is an input mask signal for write data. Input data is |
ODTx |
Input |
On-die termination: Enables (registered HIGH) and disables (registered LOW) |
Par_In |
Input |
Parity input: Parity bit for Ax, RAS#, CAS#, and WE#. |
RAS#, |
Input |
Command inputs: RAS#, CAS#, and WE# (along with S#) define the command being |
RESET# |
Input |
Reset: RESET# is an active LOW asychronous input that is connected to each DRAM and |
Sx# |
Input |
Chip select: Enables (registered LOW) and disables (registered HIGH) the command |
SAx |
Input |
Serial address inputs: Used to configure the temperature sensor/SPD EEPROM address |
SCL |
Input |
Serial |
CBx |
I/O |
Check bits: Used for system error detection and correction. |
DQx |
I/O |
Data input/output: Bidirectional data bus. |
DQSx, |
I/O |
Data strobe: Differential data strobes. Output with read data; edge-aligned with read data; |
SDA |
I/O |
Serial |
TDQSx, |
Output |
Redundant data strobe (x8 devices only): TDQS is enabled/disabled via the LOAD |
Err_Out# |
Output (open |
Parity error output: Parity error found on the command and address bus. |
EVENT# |
Output (open |
Temperature event: The EVENT# pin is asserted by the temperature sensor when critical |
VDD |
Supply |
Power supply: 1.35V (1.283–1.45V) backward-compatible to 1.5V (1.425–1.575V). The |
VDDSPD |
Supply |
Temperature sensor/SPD EEPROM power supply: 3.0–3.6V. |
VREFCA |
Supply |
Reference voltage: Control, command, and address VDD/2. |
VREFDQ |
Supply |
Reference voltage: DQ, DM VDD/2. |
VSS |
Supply |
Ground. |
VTT |
Supply |
Termination voltage: Used for control, command, and address VDD/2. |
NC |
– |
No connect: These pins are not connected on the module. |
NF |
– |
No function: These pins are connected within the module, but provide no functionality. |
Opmerkingen : De onderstaande pinbeschrijvingstabel is een uitgebreide lijst van alle mogelijke pinnen voor alle DDR3 -modules. Alle genoemde pinnen kunnen mei niet worden ondersteund op deze module. Zie PIN -toewijzingen voor informatie die specifiek is voor deze module.
Functioneel blokdiagram
4 GB, 512MX64 Module (2rank van x8)
Module -afmetingen
Vooraanzicht
Vooraanzicht
OPMERKINGEN:
1. Alle afmetingen zijn in millimeters (inches); Max/min of typisch (typ) waar genoteerd.
2.Tolerantie op alle afmetingen ± 0,15 mm tenzij anders aangegeven.
3. Het dimensionale diagram is alleen ter referentie.
Product Categorie : Industriële slimme module -accessoires
Privacy statement: Your privacy is very important to Us. Our company promises not to disclose your personal information to any external company with out your explicit permission.
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Privacy statement: Your privacy is very important to Us. Our company promises not to disclose your personal information to any external company with out your explicit permission.